1. Field of the Invention
Embodiments of the invention relate generally to semiconductor memory devices and related methods of manufacture. More particularly, embodiments of the invention relate to NAND-type nonvolatile semiconductor memory devices and related methods of manufacture.
A claim of priority is made to Korean Patent Application No. 2006-97315 filed on Oct. 2, 2006, the disclosure of which is hereby incorporated by reference in its entirety.
2. Description of Related Art
Nonvolatile memory devices are capable of retaining stored data even when disconnected from an external power source. Among nonvolatile memory devices, flash memory is one of the more popular types due at least in part to its ability to be electrically programmed and erased, its relatively high degree of integration, resistance to physical stress, and low power consumption.
Two common forms of flash memory include NOR-type flash memory and NAND type flash memory. NOR type flash memory provides high-speed random-access, and therefore NOR type flash memories are often used in applications requiring fast read performance. For example, NOR flash memories are commonly used to store microcode for controlling devices. NAND-type flash memories, on the other hand, tend to have a relatively higher level of integration and program/erase performance than NOR flash memories, and therefore NAND flash memories are often used, for example, to provide mass data storage.
A NAND type flash memory comprises a plurality of cell strings, where each cell string comprises a plurality of flash memory cells connected in series. Each cell string is connected at one end to a common drain region via a bit line and at another end to a common source region. The common drain region provides each cell string with a voltage used for programming, erasing and/or sensing operations. The common source region provides a reference voltage used in the programming, erasing and/or sensing operations.
NAND type flash memory devices are typically formed through a large number of processing operations. Among these operations, there are usually steps for depositing various layers on a substrate and other intermingled steps for creating various openings such as grooves, holes, and trenches in the various layers and in the substrate. The openings can be formed with a variety of sizes and shapes, e.g., with a large plane area and/or a small plane area. At least some of the openings will generally penetrate insulators to expose underling conductors. Other conductors can then be formed in the openings to electrically connect the underlying conductors with other features in the NAND type flash memory devices.
Proper formation of the openings tends to require very precise processing conditions. Moreover, different types, shapes, and sizes of openings tend to require different processing conditions. Unfortunately, if required processing conditions for a particular opening are not precisely met, the opening may not be properly formed. For example, the opening may not adequately expose underlying features, or the opening may be formed wider than a desired width, creating possible electrical shorts.
As the degree of integration in NAND type flash memory devices increases to new levels, line widths in the devices tend to decrease accordingly and the depths of the openings tends to increase accordingly. Unfortunately, however, conventional manufacturing techniques are not well suited to forming openings with the dimensions required for next generation NAND type flash memory devices.